DRAM Circuit Design: Fundamental and High-Speed Topics Hardcover - 2007 - 2nd Edition
by Brent Keeth; R. Jacob Baker; Brian Johnson
From the rear cover
A modern, comprehensive introduction to DRAM for students and practicing chip designers
Dynamic Random Access Memory (DRAM) technology has been one of the greatestdriving forces in the advancement of solid-state technology. With its ability to produce high product volumes and low pricing, it forces solid-state memory manufacturers to work aggressively to cut costs while maintaining, if not increasing, their market share. As a result, the state of the art continues to advance owing to the tremendous pressure to get more memory chips from each silicon wafer, primarily through process scaling and clever design.
From a team of engineers working in memory circuit design, DRAM Circuit Design gives students and practicing chip designers an easy-to-follow, yet thorough, introductory treatment of the subject. Focusing on the chip designer rather than the end user, this volume offers expanded, up-to-date coverage of DRAM circuit design by presenting both standard and high-speed implementations. Additionally, it explores a range of topics: the DRAM array, peripheral circuitry, global circuitry and considerations, voltage converters, synchronization in DRAMs, data path design, and power delivery. Additionally, this up-to-date and comprehensive book features topics in high-speed design and architecture and the ever-increasing speed requirements of memory circuits.
The only book that covers the breadth and scope of the subject under one cover, DRAM Circuit Design is an invaluable introduction for students in courses on memory circuit design or advanced digital courses in VLSI or CMOS circuit design. It also serves as an essential, one-stop resource for academics, researchers, and practicing engineers.
Details
- Title DRAM Circuit Design: Fundamental and High-Speed Topics
- Author Brent Keeth; R. Jacob Baker; Brian Johnson
- Binding Hardcover
- Edition number 2nd
- Edition 2
- Pages 440
- Volumes 1
- Language ENG
- Publisher Wiley-IEEE Press, Piscataway, N. J
- Date 2007
- Illustrated Yes
- Features Bibliography, Glossary, Illustrated, Index, Table of Contents
- ISBN 9780470184752 / 0470184752
- Weight 1.68 lbs (0.76 kg)
- Dimensions 9.32 x 6.57 x 1.06 in (23.67 x 16.69 x 2.69 cm)
- Library of Congress subjects Electronic circuit design, Random access memory
- Dewey Decimal Code 621.397
Media reviews
Citations
- Scitech Book News, 06/01/2008, Page 172
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